1. Field of the Invention
This invention relates to the use of thermal processing in the fabrication of integrated circuits (IC) and, more particularly, laser thermal processing (LTP) in the fabrication of many ICs on a silicon wafer, wherein each IC may comprise a plurality of metal oxide semiconductor field-effect transistors (MOSFETs) employing shallow junction formation.
2. Description of the Prior Art
Incorporated by reference herein is U.S. Pat. No. 5,956,603, which issued Sep. 21, 1999 and is assigned to the i ee of the present application. This patent teaches a method for fabricating a plurality of shallow-junction metal oxide semiconductor field-effect transistors (MOSFETs) on a given area of a silicon wafer, in the case in which the MOSFETs are spaced from one another by substantially transparent isolation elements. The method includes an LTP step of flooding the entire given area with laser radiation that is intended to effect the heating to a desired threshold temperature of only the given depth of a surface layer of silicon that has been previously amorphized to this given depth and then doped. This threshold temperature is sufficient to melt amorphized silicon but is insufficient to melt crystalline silicon. However, should the laser radiation be directly incident on both the substantially transparent isolation elements and the silicon surface, a variable portion of the energy of the incident radiation traveling through the substantially transparent isolation elements would be transferred to the silicon surfaces in contact with the isolation elements depending on the depth of the isolation elements thereby causing unpredictable additional heating of the silicon which would result in an unwanted shift in the fluence required to reach the melt threshold temperature in those silicon regions which reach the melt threshold temperature. To prevent this, a top layer stack of a dielectric and a highly radiation-absorbent material (e.g., a 5-50 nm range of a silicon dioxide thin-film under a layer covered by a 20-100 nm range of tantalum nitride thin-film top layer) is deposited over the given area prior to the flooding of the entire given area with laser radiation taking place. After, the melted silicon has cooled and recrystallized, the top layer of highly radiation-absorbent material is stripped.
The total area of the silicon wafer is much larger than the given area occupied by a single IC, wherein a single IC may be composed of the aforesaid plurality of shallow-junction MOSFETs. This permits many ICs to be fabricated on the same silicon wafer. Each of these many ICs being fabricated is successively flooded, in turn, with laser radiation over its entire given area. However, due to (1) the technique employed to deposit the radiation-absorbent material, (2) thin film interference and/or (3) surface roughness of the film, the laser-radiation energy absorbed by the surface layers over the entire given area of an IC varies from successively-flooded IC to IC of the many ICs being fabricated. This variation in energy absorption results in a problem of either the energy absorption being so high as to cause undesired ablation of the surface layers or melting of crystalline silicon of some of the ICs being fabricated due to overheating or, alternatively, or undesired no melting of the surface layers and/or activation at the source and drain regions of others of the ICs being fabricated due to under heating.
The present invention is directed to a solution to this problem.
Broadly, the present invention is directed to deriving an output ea indicative of the fraction of the radiation energy flooding a given surface area a silicon wafer which is absorbed by the silicon wafer in accordance with the equation ea=eTxe2x88x92(er+es+et), where eT is a measured total value of the flooding radiation energy which is insufficient to damage or significantly heat the silicon wafer, er is the measured value of the fraction the flooding radiation energy which is specularly reflected from the given surface area, es is the measured value of any non-negligible fraction of the flooding radiation energy which is scattered by the given surface area and et is the measured value of any non-negligible fraction of the flooding radiation energy which is transmitted through the wafer. More specifically, the present invention is directed to the thermal-processing fabrication of a shallow-junction of an IC occupying the given surface area on the silicon wafer, and the wafer comprises crystalline silicon having an overlying surface layer of amorphized silicon covered by radiation-absorbent material. In this case, the flooding radiation energy has given spectral characteristics and the output ea is subsequently employed for a given time duration to adjust the fluence value of an illumination source, that has spectral characteristics similar to the given spectral characteristics and emits second radiation energy flooding the given surface area with a fluence value sufficiently high to result in the second radiation energy effecting the melting of the amorphized silicon but not high enough to result in the second radiation energy effecting either the melting of the crystalline silicon or the ablation of the radiation-absorbent material.